Target Skew

Target Skew, the skew value on which the cts engine will try to build a balanced clock tree. In this post we will discuss about on which factors we will choose the target skew of our design & how’s that factors affect our design QOR.

As a designer, it is general tendency to have a zero skew & have a perfect balanced clock tree, but Zero skew is not overall good for design, why? Think about in terms of latency, buffer count, Dynamic power & congestion.

For Zero skew, overall latency of a design is going to increase, as it will take more clock Buff/Inv to balance the flops (for zero skew), which may results in increase of uncommon clock path (more prone to OCV variation)  & high dynamic power dissipation as all the flops & buffer will going to toggle at same time. As each clock net takes double routing resource because of NDR settings apply on clock net, so the congestion also increases as the lesser skew are targeted.

As the technology is shrinking, so it is becoming more critical to close timing across corners. Skew has direct impact on setup/hold. The main motive to attain Zero skew is the hold timing across all the corners. So, by optimal selection of skew number (target skew), we will decrease clock power consumption, clock buffer/inv count & significant congestion reduction.

How we will analyze the Target skew value?

For Target skew we have to do multiple experiments, creating clock tree with target skew defined by keeping the constraints constant (SDC) & then different Skew numbers are analyzed based on latency, power & congestion.

We know that hold timing equation of a flop i.e,

Figure 1: Timing Path

                               T_ck->q + T_comb > T_Skew  + T_Hold

We can re-write this as,

                               T_Skew  < T_ck->q + T_comb - T_Hold

For worst case scenario in hold ,lets suppose T_comb = 0 (flops sitting very near, no logic path), above equation can be rewritten as

                              T_Skew  < T_ck->q  - T_Hold  

Lets assume flop delay in worst case is 100 ps & hold time is 30 ps

                                  T_Skew  < 70 ps

Which mean there is a scope of ~70 ps skew without degrading hold timing in worst case.

So we do multiple iterations by setting the target skew in range of +- 30 ps & analyse for above factors as well as for checked for timing(NFE) in all the corners.

NFE -> No. of failing endpoints

Let me know if you have any doubts. Stay Blessed!!